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Computer Architecture
COMP ARCH
CLASS CODE: COMPE 324 CREDITS:  3
DIVISION: PHYSICAL SCIENCE & ENGINEERING
DEPARTMENT: ELECTRICAL & COMPUTER ENGINEERING
GENERAL EDUCATION: This course does not fulfill a General Education requirement.

DESCRIPTION: Instruction sets, control unit and data path design, memory hierarchy, pipelining, and I/O. Laboratory exercises are included.
TAUGHT: Fall, Winter
CONTENT AND TOPICS: Instruction sets, control unit and data path design, memory hierarchy, pipelining, and I/O.
GOALS AND OBJECTIVES: 1. Describe an instruction set architecture, including instruction types, addressing modes, and operand types;
2. Design a data path, ALU, and control unit at the gate/register level to implement a simple instruction set architecture;
3. Implement a software model of a CPU;
4. Diagram the components and operation of hierarchical memory systems;
5. Describe the principles of pipelining and its associated throughput hazards;
6. State the advantages and disadvantages of programmed and interrupt I/O.
7. Apply knowledge of mathematics, science, engineering, and comuputer fundamentals.
8. Design and conduct experiments, analyzing and interpreting data.
9. Design a system, component, or process to meet desired needs.
10. Use teh techniques, skills, and modern engineering tools necessary for engineering practice.
REQUIREMENTS:
PREREQUISITES: CompE 224
OTHER:
EFFECTIVE DATE: August 2001